Reading data from the AT25010B/AT25020B/AT25040B via the SO pin requires
the following sequence. After the CS line is pulled low to
select a device, the READ (03h) instruction (including A8
for the AT25040B) is transmitted via the SI line, followed by
the 8‑bit address to be read (A7 -
A0). Refer to Table 7-1 for the
AT25010B/AT25020B/AT25040B address bits.
Upon completion of the 8‑bit address, any data present
on the SI line will be ignored. The data (D7‑D0) at the specified
address are then shifted out onto the SO line. If only one byte is to be read, the
CS line should be driven high after the data are output.
The read sequence can continue because the byte address is automatically incremented,
allowing data to continue shifting out. When the highest‑order address is reached, the
address counter rolls over to the lowest‑order address, allowing the entire memory array
to be read in one continuous read cycle regardless of the starting address.Figure 7-1. Read Waveform
Note:
“A” represents the MSb
address bit (A8) for the AT25040B and
functions as a “don’t care” bit for the AT25020B
and AT25010B.
DS20006251C
The online versions of the documents are provided as a courtesy. Verify all content and data in the device’s PDF documentation found on the device product page.
