11.5.2 Control B
| Name: | CTRLB |
| Offset: | 0x01 |
| Reset: | 0x30 |
| Property: | Configuration Change Protection |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| FLMAPLOCK | FLMAP[1:0] | EEWP | APPDATAWP | BOOTRP | APPCODEWP | ||||
| Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | ||
| Reset | 0 | 1 | 1 | 0 | 0 | 0 | 0 | ||
Bit 7 – FLMAPLOCK Flash Mapping Lock
Setting this bit to ‘1’ prevents further updates of FLMAP[1:0].
Only a Reset can clear this bit.
Bits 5:4 – FLMAP[1:0] Flash Section Mapped into Data Space
Select which part (in blocks of 32 KB) of the Flash will be mapped as part of the
CPU data space and accessible through LD/ST instructions.
| Value | Name | Mapped Flash Section |
|---|---|---|
| 16 KB | ||
0x0 |
SECTION0 | 0-16 |
0x1 |
SECTION1 | 0-16 |
0x2 |
SECTION2 | 0-16 |
0x3 |
SECTION3 | 0-16 |
Bit 3 – EEWP EEPROM Write Protection
Writing a ‘1’ to this bit protects the EEPROM from
further writes.
This bit can only be written to ‘1’. It is cleared
to ‘0’ only by Reset.
Bit 2 – APPDATAWP Application Data Section Write Protection
Writing a ‘1’ to this bit protects the application
data section from further writes.
This bit can only be written to ‘1’. It is cleared
to ‘0’ only by Reset.
Bit 1 – BOOTRP Boot Section Read Protection
Writing a ‘1’ to this bit protects the BOOT section from a read
and instruction fetch. If issuing a read from the application section, it will
return ‘0’. An instruction fetch from the BOOT section will
return a NOP instruction.
This bit can only be written to ‘1’ from the BOOT section. It is
cleared to ‘0’ only by Reset. The bit will only take effect
when the BOOT section is left the first time after the bit is written.
Bit 0 – APPCODEWP Application Code Section Write Protection
Writing a ‘1’ to this bit protects the application
code section from further writes.
This bit can only be written to ‘1’. It is cleared
to ‘0’ only by Reset.