Table 17-2. Reset and Interrupt Vectors in
ATmega88PBVector
No. | Program
Address(2) | Source | Interrupt
Definition |
---|
1 | 0x000(1) | RESET | External Pin,
Power-on Reset, Brown-out Reset and Watchdog System Reset |
2 | 0x001 | INT0 | External
Interrupt Request 0 |
3 | 0x002 | INT1 | External
Interrupt Request 1 |
4 | 0x003 | PCINT0 | Pin Change
Interrupt Request 0 |
5 | 0x004 | PCINT1 | Pin Change
Interrupt Request 1 |
6 | 0x005 | PCINT2 | Pin Change
Interrupt Request 2 |
7 | 0x006 | WDT | Watchdog
Time-out Interrupt |
8 | 0x007 | TIMER2
COMPA | Timer/Counter2
Compare Match A |
9 | 0x008 | TIMER2
COMPB | Timer/Counter2
Compare Match B |
10 | 0x009 | TIMER2
OVF | Timer/Counter2
Overflow |
11 | 0x00A | TIMER1
CAPT | Timer/Counter1
Capture Event |
12 | 0x00B | TIMER1
COMPA | Timer/Counter1
Compare Match A |
13 | 0x00C | TIMER1
COMPB | Timer/Coutner1
Compare Match B |
14 | 0x00D | TIMER1
OVF | Timer/Counter1
Overflow |
15 | 0x00E | TIMER0
COMPA | Timer/Counter0
Compare Match A |
16 | 0x00F | TIMER0
COMPB | Timer/Counter0
Compare Match B |
17 | 0x010 | TIMER0
OVF | Timer/Counter0
Overflow |
18 | 0x011 | SPI,
STC | SPI Serial
Transfer Complete |
19 | 0x012 | USART,
RX | USART Rx
Complete |
20 | 0x013 | USART,
UDRE | USART, Data
Register Empty |
21 | 0x014 | USART,
TX | USART, Tx
Complete |
22 | 0x015 | ADC | ADC Conversion
Complete |
23 | 0x016 | EE
READY | EEPROM
Ready |
24 | 0x017 | ANALOG
COMP | Analog
Comparator |
25 | 0x018 | TWI | 2-wire Serial
Interface (I2C) |
26 | 0x019 | SPM
READY | Store Program
Memory Ready |
27 | 0x01A | USART,
START | USART Start
Edge Interrupt |
Note:
- When the BOOTRST Fuse is programmed,
the device will jump to the Boot Loader address at reset, see Boot Loader Support
– Read-While-Write Self-Programming chapter.
- When the IVSEL bit in MCUCR
(MCUCR.IVSEL) is set, Interrupt Vectors will be moved to the start of the Boot Flash
Section. The address of each Interrupt Vector will then be the address in this table
added to the start address of the Boot Flash Section.
The following table shows reset and
Interrupt Vectors placement for the various combinations of BOOTRST and MCUCR.IVSEL
settings. If the program never enables an interrupt source, the Interrupt Vectors are
not used, and regular program code can be placed at these locations. This is also the
case if the Reset Vector is in the Application section while the Interrupt Vectors are
in the Boot section or vice versa.
Table 17-3. Reset and Interrupt Vectors
Placement in ATmega88PBBOOTRST | IVSEL | Reset
Address | Interrupt
Vectors Start Address |
---|
1 | 0 | 0x000 | 0x001 |
1 | 1 | 0x000 | Boot Reset
Address + 0x001 |
0 | 0 | Boot Reset
Address | 0x001 |
0 | 1 | Boot Reset
Address | Boot Reset
Address + 0x001 |
Note: The Boot Reset Address is shown in
Table. Boot Size Configuration, ATmega88PB in ATmega88PB Boot Loader Parameters.
For the BOOTRST Fuse “1” means unprogrammed while “0” means programmed.
The most typical and general program setup
for the Reset and Interrupt Vector Addresses in ATmega88PB is:
Address | Labels | Code Comments |
---|
0x000 | rjmp | RESET | ; Reset Handler |
0x001 | rjmp | EXT_INT0 | ; IRQ0 Handler |
0x002 | rjmp | EXT_INT1 | ; IRQ1 Handler |
0x003 | rjmp | PCINT0 | ; PCINT0 Handler |
0x004 | rjmp | PCINT1 | ; PCINT1 Handler |
0x005 | rjmp | PCINT2 | ; PCINT2 Handler |
0x006 | rjmp | WDT | ; Watchdog Timer Handler |
0x007 | rjmp | TIM2_COMPA | ; Timer2 Compare A Handler |
0X008 | rjmp | TIM2_COMPB | ; Timer2 Compare B
Handler |
0x009 | rjmp | TIM2_OVF | ; Timer2 Overflow Handler |
0x00A | rjmp | TIM1_CAPT | ; Timer1 Capture Handler |
0x00B | rjmp | TIM1_COMPA | ; Timer1 Compare A Handler |
0x00C | rjmp | TIM1_COMPB | ; Timer1 Compare B Handler |
0x00D | rjmp | TIM1_OVF | ; Timer1 Overflow Handler |
0x00E | rjmp | TIM0_COMPA | ; Timer0 Compare A
Handler |
0x00F | rjmp | TIM0_COMPB | ; Timer0 Compare B
Handler |
0x010 | rjmp | TIM0_OVF | ; Timer0 Overflow Handler |
0x011 | rjmp | SPI_STC | ; SPI Transfer Complete
Handler |
0x012 | rjmp | USART_RXC | ; USART, RX Complete
Handler |
0x013 | rjmp | USART_UDRE | ; USART, UDR Empty
Handler |
0x014 | rjmp | USART_TXC | ; USART, TX Complete
Handler |
0x015 | rjmp | ADC | ; ADC Conversion Complete
Handler |
0x016 | rjmp | EE_RDY | ; EEPROM Ready Handler |
0x017 | rjmp | ANA_COMP | ; Analog Comparator
Handler |
0x018 | rjmp | TWI | ; 2-wire Serial Interface
Handler |
0x019 | rjmp | SPM_RDY | ; Store Program Memory Ready
Handler |
; | | | |
0x01A | RESET: ldi | r16, high(RAMEND) | ; Main program start |
0x01B | out | SPH,r16 | ; Set Stack Pointer to top of
RAM |
0x01C | ldi | r16, low(RAMEND) | |
0x01D | out | SPL,r16 | |
0x01E | sei | | ; Enable interrupts |
0x01F | <instr> | xxx | |
When the BOOTRST Fuse is unprogrammed, the
Boot section size set to 2Kbytes and the IVSEL bit in the MCUCR Register (MCUCR.IVSEL) is
set before any interrupts are enabled, the most typical and general program setup for the
Reset and Interrupt Vector Addresses in ATmega88PB is:
Address | Labels | Code Comments |
---|
0x000 | RESET: ldi | r16,high(RAMEND) | ; Main program start |
0x001 | out | SPH,r16 | ; Set Stack Pointer to top of
RAM |
0x002 | ldi | r16,low(RAMEND) | |
0x003 | out | SPL,r16 | |
0x004 | sei | | ; Enable interrupts |
0x005 | <instr> | xxx | |
; | | | |
.org | 0xC01 | | |
0xC01 | rjmp | EXT_INT0 | ; IRQ0 Handler |
0xC02 | rjmp | EXT_INT1 | ; IRQ1 Handler |
... | ... | | ... |
; | | | |
0xC19 | rjmp | SPM_RDY | ; Store Program Memory Ready
Handler |
When the BOOTRST Fuse is programmed and the
Boot section size set to 2Kbytes, the most typical and general program setup for the Reset
and Interrupt Vector Addresses in ATmega88PB is:
Address | Labels | Code Comments |
---|
.org | 0x001 | | |
0x001 | rjmp | EXT_INT0 | ; IRQ0 Handler |
0x002 | rjmp | EXT_INT1 | ; IRQ1 Handler |
... | ... | ... | |
| | | |
0x019 | rjmp | SPM_RDY | ; Store Program Memory Ready
Handler |
; | | | |
.org | 0xC00 | | |
0xC00 | RESET: ldi | r16,high(RAMEND) | ; Main program start |
0xC01 | out | SPH,r16 | ; Set Stack Pointer to top of
RAM |
0xC02 | ldi | r16,low(RAMEND) | |
0xC03 | out | SPL,r16 | |
0xC04 | sei | | ; Enable interrupts |
0xC05 | <instr> | xxx | |
When the BOOTRST Fuse is programmed, the
Boot section size set to 2Kbytes and the IVSEL bit in the MCUCR Register (MCUCR.IVSEL) is
set before any interrupts are enabled, the most typical and general program setup for the
Reset and Interrupt Vector Addresses in ATmega88PB is:
Address | Labels | | Code Comments |
---|
; | | | |
.org | 0xC00 | | |
0xC00 | rjmp | RESET | ; Reset handler |
0xC01 | rjmp | EXT_INT0 | ; IRQ0 Handler |
0xC02 | rjmp | EXT_INT1 | ; IRQ1 Handler |
... | ... | | ... |
; | | | |
0xC19 | rjmp | SPM_RDY | ; Store Program Memory Ready
Handler |
; | | | |
0xC1A | RESET: ldi | r16,high(RAMEND) | ; Main program start |
0xC1B | out | SPH,r16; | ; Set Stack Pointer to top of
RAM |
0xC1C | ldi | r16,low(RAMEND) | |
0xC1D | out | SPL,r16 | |
0xC1E | sei | | ; Enable interrupts |
0xC1F | <instr> | xxx | |