8-bit to 16-bit programmable data length per chip select
Programmable phase and polarity per chip select
Programmable transfer delay between consecutive transfers and
delay before MCSPI clock per chip select
Programmable delay between chip selects
Selectable mode fault detection
Two-Pin Mode Support For Easy Link with External MCP3910 ADC and CRC
Field Support
Host Mode can Drive SPCK up to Peripheral Clock
8-data Transmit and
Receive FIFOs
Host Mode Bit Rate can be Independent of the Processor/Peripheral
Clock
Client Mode Operates on SPCK, Asynchronously with Core and Bus
Clock
Four Chip Selects with External Decoder Support Allow Communication with up to 15 Peripherals
Communication with Serial External Devices Supported
Serial memories, such as DataFlash and 3-wire EEPROMs
Serial peripherals, such as ADCs, DACs, LCD controllers, CAN controllers and sensors
External coprocessors
Connection to PDC Channel Capabilities, Optimizing Data Transfers
One channel for the receiver
One channel for the transmitter
Register Write Protection
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