7.2 Positive Input-AIN0 Pin Configuration

When the ACBG bit of the ACSR is cleared, the AIN0 pin is applied to the positive input of the Analog Comparator.

Figure 7-2. Analog Comparator Control and Status Register

Bit 7 – ACD: Analog Comparator Disable

This bit can be set at any time to turn off the Analog Comparator.

Bit 6 – ACBG: Analog Comparator Bandgap Select

When this bit is cleared, AIN0 is applied to the positive input of the Analog Comparator; When this bit is set, a fixed bandgap reference voltage replaces the positive input to the Analog Comparator.