22.2 PPS Inputs

Each digital peripheral has a dedicated PPS Peripheral Input Selection (xxxPPS) register with which the input pin to the peripheral is selected. Devices that have 20 leads or less (8/14/16/20) allow PPS routing to any I/O pin, while devices with 28 leads or more allow PPS routing to I/Os contained within two ports (see the table below).

Important: The notation “xxx” in the generic register name is a placeholder for the peripheral identifier. For example, xxx = T0CKI for the T0CKIPPS register.

Multiple peripherals can operate from the same source simultaneously. Port reads always return the pin level regardless of peripheral PPS selection. If a pin also has analog functions associated, the ANSEL bit for that pin must be cleared to enable the digital input buffer.

Table 22-1. PPS Input Selection Table
Peripheral PPS Input Register Default Pin Selection at POR Register Reset Value at POR Available Input Port
28-Pin Devices 40-Pin Devices 48-Pin Devices
Interrupt 0 INT0PPS RB0 ‘b001 000 A B — W A B — — — W A B — — — — W
Interrupt 1 INT1PPS RB1 ‘b001 001 A B — W A B — — — W — B — D — — W
Interrupt 2 INT2PPS RB2 ‘b001 010 A B — W A B — — — W — B — — — F W
Timer0 Clock T0CKIPPS RA4 ‘b000 100 A B — W A B — — — W A — — — — F W
Timer1 Clock T1CKIPPS RC0 ‘b010 000 A — C W A — C — — W — — C — E — W
Timer1 Gate T1GPPS RB5 ‘b001 101 — B C W — B C — — W — B C — — — W
Timer3 Clock T3CKIPPS RC0 ‘b010 000 — B C W — B C — — W — — C — E — W
Timer3 Gate T3GPPS RC0 ‘b010 000 A — C W A — C — — W A — C — — — W
Timer2 Input T2INPPS RC3 ‘b010 011 A — C W A — C — — W A — C — — — W
Timer4 Input T4INPPS RC5 ‘b010 101 — B C W — B C — — W — B C — — — W
Timer6 Input T6INPPS RB7 ‘b001 111 — B C W — B — D — W — B — D — — W
Universal Timer Input 0 TUIN0PPS RC0 ‘b010 000 A — C W — — C — E W — — C — E — W
Universal Timer Input 1 TUIN1PPS RB5 ‘b001 101 — B C W — B C — — W — B — — — F— W
CCP1 CCP1PPS RC2 ‘b010 010 — B C W — B C — — W — — C — — F W
CCP2 CCP2PPS RC1 ‘b010 001 — B C W — B C — — W — — C — — F W
PWM Input 0 PWMIN0PPS RC2 ‘b010 010 — B C W — B C — — W — — C — — F W
PWM Input 1 PWMIN1PPS RC1 ‘b010 001 — B C W — B C — — W — — C — — F W
PWM1 External Reset Source PWM1ERSPPS RC3 ‘b010 011 A — C W A — C — — W A — C — — W
PWM2 External Reset Source PWM2ERSPPS RC5 ‘b010 101 A — C W A — C — — W — — C — E — W
PWM3 External Reset Source PWM3ERSPPS RB7 ‘b001 111 — B C W — B — D — W — B — D — — W
CWG1 CWG1PPS RB0 ‘b001 000 — B C — — B — D — — — B — D — — —
CLCx Input 1 CLCIN0PPS RA0 ‘b000 000 A — C W A — C — — W A — C — — — W
CLCx Input 2 CLCIN1PPS RA1 ‘b000 001 A — C W A — C — — W A — C — — — W
CLCx Input 3 CLCIN2PPS RB6 ‘b001 110 — B C W — B — D — W — B — D — — W
CLCx Input 4 CLCIN3PPS RB7 ‘b001 111 — B C W — B — D — W — B — D — — W
CLCx Input 5 CLCIN4PPS RA0 ‘b000 000 A — C W A — C — — W A — C — — — W
CLCx Input 6 CLCIN5PPS RA1 ‘b000 001 A — C W A — C — — W A — C — — — W
CLCx Input 7 CLCIN6PPS RB6 ‘b001 110 — B C W — B — D — W — B — D — — W
CLCx Input 8 CLCIN7PPS RB7 ‘b001 111 — B C W — B — D — W — B — D — — W
ADC Conversion Trigger ADACTPPS RB4 ‘b001 100 — B C W — B — D — W — B — D — — W
SPI1 Clock SPI1SCKPPS RC3 ‘b010 011 — B C W — B C — — W — B C — — — W
SPI1 Data SPI1SDIPPS RC4 ‘b010 100 — B C W — B C — — W — B C — — — W
SPI1 Client Select SPI1SSPPS RA5 ‘b000 101 A — C W A — — D — W A — — D — — W
SPI2 Clock SPI2SCKPPS RB1 ‘b001 001 — B C W — B — D — W — B — D — — W
SPI2 Data SPI2SDIPPS RB2 ‘b001 010 — B C W — B — D — W — B — D — — W
SPI2 Client Select SPI2SSPPS RB0 ‘b001 000 — B C W — B — D — W — B — D — — W
I2C1 Clock I2C1SCLPPS(1) RC3 ‘b010 011 — B C — — B C — — — — B C — — — —
I2C1 Data I2C1SDAPPS(1) RC4 ‘b010 100 — B C — — B C — — — — B C — — — —
I2C2 Clock I2C2SCLPPS(1) RB1 ‘b001 001 — B C — — B — D — — — B — D — — —
I2C2 Data I2C2SDAPPS(1) RB2 ‘b001 010 — B C — — B — D — — — B — D — — —
UART1 Receive U1RXPPS RC5 ‘b010 111 — B C W — B C — — W — — C — — F W
UART1 Clear to Send U1CTSPPS RC6 ‘b010 110 — B C — — B C — — — — — C — — F —
UART2 Receive U2RXPPS RB7 ‘b001 111 — B C W — B — D — W — B — D — — W
UART2 Clear to Send U2CTSPPS RB6 ‘b001 110 — B C — — B — D — — — B — D — — —
PORTW Input 0 PORTWIN0PPS RB2 ‘b001 010 A B — — — B — D — —
PORTW Input 1 PORTWIN1PPS RB0 ‘b001 000 A B — — — B — D — — — B — D — — —
PORTW Clock PORTWCLKPPS RB1 ‘b001 001 A B — — — B — D — — — B — D — — —
Note:
  1. Bidirectional pin. The corresponding output must select the same pin.