Right/Left/Center/Variable
Aligned modes of operation
Multiple clock and Reset
signal selections
Three 16-Bit Timers (TMR0/1/3)
Three 8-Bit Timers (TMR2/4/6) with
Hardware Limit Timer (HLT)
Two Universal Timers
(TU16A/TU16B):
New Timer module that combines most of the operations of all legacy timers
(TMR0/1/2, SMT, CCP) into one single timer
Two 16-bit timers can be
chained together to create a combined 32-bit timer
Eight Configurable Logic Cells
(CLC):
Integrated combinational and
sequential logic
One Complimentary Waveform Generator
(CWG):
Rising and falling edge
dead-band control
Full Bridge, Half Bridge,
One-Channel drive modes
Multiple signal sources
Programmable dead band
Fault-shutdown input
Two Capture/Compare/PWM (CCP)
Modules:
16-bit resolution for
Capture/Compare modes
10-bit resolution for PWM
mode
One Numerically Controlled Oscillator
(NCO):
Generates true linear
frequency control and increased frequency resolution
Input clock up to 64 MHz
Programmable CRC with Memory Scan:
Reliable data/program memory
monitoring for Fail-Safe operation (e.g., Class B)
Calculate 32-bit CRC over any
portion of Program Flash Memory
Two UART Modules:
One module (UART1) supports
LIN host and client, DALI® mode and DMX mode
Asynchronous UART, RS-232,
RS-485 compatible
Automatic and user timed
BREAK period generation
Automatic checksums
Programmable Stop bits (1,
1.5 and 2 Stop bits)
Wake-up on BREAK
reception
DMA compatible
Two SPI Modules:
Configurable length
bytes
Arbitrary length data
packets
Transmit-without-receive and
receive-without-transmit options
Transfer byte counter
Separate transmit and receive
buffers with 2-byte FIFO and DMA capabilities
Two I2C Modules, SMBus,
PMBus™ Compatible:
Supports Standard mode (100
kHz), Fast mode (400 kHz) and Fast mode plus (1 MHz) modes of operation,
with built-in internal pull-up resistors
7-bit and 10-bit Addressing
modes with Address Masking modes
Dedicated address, transmit
and receive buffers and DMA capabilities
Bus collision detection with
arbitration
Bus time-out detection and
handling
I2C, SMBus 2.0 and
SMBus 3.0, and 1.8V input level selections
Separate transmit and receive
buffers with 2-byte FIFO and DMA capabilities
Multi-Host mode, including
self-addressing
One 8-Bit Signal Routing Port
Module:
Eight signal routing pins per
module
Supports software read/write and customizable input/output control
Supports flip-flops and clock source selection for Hardware State Machine
and shift register application
Integration with PPS, Interrupt-on-Change and DMA/ADC triggers
available
Device I/O Port Features:
24 I/O pins including four
MVIO pins powered by VDDIO2 (PIC18F24/25/26Q24)
35 I/O pins including 12 MVIO
pins powered by VDDIO2 (PIC18F45/46Q24)
43 I/O pins including 12 MVIO
pins powered by VDDIO2 (PIC18F55/56Q24)
MVIO pins support a voltage
range of 1.62V through 5.5V
Individually programmable I/O
direction, open-drain, slew rate, and weak pull-up control
Low-voltage interface on all
I/O pins using LV-TTL input buffer
Interrupt-on-change on most
pins
Three programmable external
interrupt pins
Peripheral Pin Select (PPS):
Enables pin mapping of
digital I/O
The online versions of the documents are provided as a courtesy. Verify all content and data in the device’s PDF documentation found on the device product page.