2.6.1 Self Erase and Self Program

PIC32MZ2051W104132/WFI32E03/WFI32E04 may generate an invalid instruction exception while performing run-time self-erase and self-program operations.

Work Around

Use MPLAB® Harmony v3 (CSP v3.18.4 or higher) or implement NVM write and erase routines such that NVM unlock, NVM write control and NVM wait operations are performed while executing from RAM. The steps required to be performed in NVM are: disable all the interrupts, set the NVMCON WREN bit, then execute the code from RAM. (Write the unlock key sequence, then set the NVMCON WR bit to start the operation. Then, wait until the operation completes. The NVMCON WR bit will be cleared when the operation completes.) Then, enable all the interrupts. For more details, refer to this Knowledge Base Article.

Affected Silicon Revisions

A0A1B0C0
X———