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Classical Constraint Flow for SmartFusion® 2, IGLOO® 2, and RTG4™ Devices
Classical Constraint Flow for SmartFusion® 2, IGLOO® 2, and RTG4™ Devices
  1. Home
  2. 9 Publish Block - Configuration Options
  3. 9.2 Publish Options/Settings

  • Introduction
  • 1 Creating Blocks - Options and Settings
  • 2 Instantiating Blocks in your Top-Level Design
  • 3 Publishing Blocks After Compile or Layout
  • 4 Hierarchical Structure Resolution in Top-Level Projects
  • 5 EDIF Netlist in the Top-Level Design
  • 6 Synthesis
  • 7 Resolving Place and Route Conflicts
  • 8 Block PDC Commands
  • 9 Publish Block - Configuration Options
    • 9.1 Publish Block Configuration
    • 9.2 Publish Options/Settings
  • 10 Revision History
  • Microchip FPGA Support
  • Microchip Information

9.2 Publish Options/Settings

Use the Publish Block - Configuration Options to configure the block for publication.

The online versions of the documents are provided as a courtesy. Verify all content and data in the device’s PDF documentation found on the device product page.

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