When the Reset push button switch is pressed, the device places all pins into their default state. An additional PIO resets the KSZ8563.
The figure below illustrates the implementation of the Ethernet switch interface.
PIO | Mnemonic | Shared | Signal Description |
---|---|---|---|
PD9 | ETH_GTXCK | – | Transmit clock |
PD10 | ETH_GTXEN | – | Transmit enable |
PD2 | ETH_GTXER | – | Transmit error |
PD15 | ETH_GTX0 | – | Transmit data 0 |
PD16 | ETH_GTX1 | – | Transmit data 1 |
PD7 | ETH_GTX2 | – | Transmit data 2 |
PD8 | ETH_GTX3 | – | Transmit data 3 |
PD1 | ETH_GRXCK | – | Receive clock |
PD11 | ETH_GRXDV | – | Receive data valid |
PD12 | ETH_GRXER | – | Receive error |
PD13 | ETH_GRX0 | – | Receive data 0 |
PD14 | ETH_GRX1 | – | Receive data 1 |
PD5 | ETH_GRX2 | – | Receive data 2 |
PD6 | ETH_GRX3 | – | Receive data 3 |
PB30 | ETH_GMDC | – | Management data clock |
PB28 | ETH_GMDIO | – | Management data in/out |
PD3 | ETH_GTX_INT | – | Interrupt (open drain) |
PD4 | ETH_RST | – | PIO reset |
PC16 | ETH_PME_N | – | Power management event |
The table below describes the pin assignment of Ethernet connectors J11 and J12.
Pin No | Mnemonic | Signal Description |
---|---|---|
1 | TX+ | Transmit |
2 | TX- | Transmit |
3 | RX+ | Receive |
4 | Decoupling capacitor | – |
5 | Decoupling capacitor | – |
6 | RX- | Receive |
7 | NC | – |
8 | EARTH / GND | Common ground |
9 | ACT LED | LED activity |
10 | ACT LED | LED activity |
11 | LINK LED | LED link connection |
12 | LINK LED | LED link connection |
13 | EARTH / GND | Common ground |
14 | EARTH / GND | Common ground |