The LAN9252 is a 2-port EtherCAT Slave Controller (ESC) with dual integrated Ethernet PHYs. Each PHY contains a full-duplex transceiver and supports 100 Mbps (100Base-TX) operation.

PORT0 of LAN9252 is connected to the host processor through the PIOs in HBI Indexed mode. The HBI supports 8/16-bit operation with Big, Little, and Mixed Endian operations. Two process data RAM FIFOs interface the HBI to the EtherCAT slave controller and facilitate the transferring of process data information between the host CPU and the EtherCAT slave. A configurable host interrupt pin allows the device to inform the host CPU of any internal interrupts.

Several PIOs are shared with the Wi-Fi/BT WILC3000 interface. When the WILC3000 interface is enabled, the LAN9252 (NCS1 PC6) is disabled via the WILC3K_CE PC15 signal.

The LAN9252 is connected to two RJ45 Ethernet jacks with integrated magnetics for 100Base-TX connectivity. Additionally, for monitoring and control purposes, LED functionality is carried on the RJ45 connectors to indicate activity and link status information.

For more information about the Ethernet controller device, refer to the Microchip LAN9252 controller data sheet.