Serial EEPROM with Unique MAC Address

The SAMA5D2-ICP board embeds three Microchip 24AA025E48 I2C serial EEPROMs using the TWI1 interface.

The TWI interface is I2C compatible; it uses only two lines, namely serial data (SDA) and serial clock (SCL). According to the standard, the TWI clock rate is limited to 400 kHz in Fast mode and 100 kHz in Normal mode, but a configurable baud rate generator permits the output data rate to be adapted to a wide range of core clock frequencies. The TWI supports both Master and Slave modes.

The 24AA025E48 provides 2048 bits of serial Electrically-Erasable Programmable Read-Only Memory (EEPROM) organized as two blocks of 128 x 8-bit memory. In addition, the 24AA025E48 incorporates an easy and inexpensive method to obtain a globally unique MAC or EUI address (EUI-48™).

The EUI-48 addresses can be assigned as the actual physical address of a system hardware device or node, or it can be assigned to a software instance. These addresses are factory-programmed by Microchip and guaranteed unique.

CAUTION: One EEPROM device at the address 50h is used as a “software label” to store board information such as chip type, manufacturer name and production date, using the last two 16-byte blocks in memory. The information contained in these blocks should not be modified.
Table 1. EEPROM TWI Address
Address + Offset + R/W Bit Component
Base (1010) + Offset (001) + R/W EEPROM1(U9)
Base (1010) + Offset (011) + R/W EEPROM2 (U10)
Base (1010) + Offset (000) + R/W EEPROM3 (U11)
Table 2. EEPROM PIO Signal Descriptions
PIO Mnemonic Shared Signal Description

The figure below illustrates the implementation of the three EEPROM memories.

Figure 1. EEPROM 24AA025E48