36.6 I/O Lines Programming Example

The programming example shown in the table below is used to obtain the following configurations:

  • PIOA Configuration:
    • 4-bit output port on Secure I/O lines 0 to 3, open-drain, with pull-up resistor
    • Four output signals on Non-Secure I/O lines 4 to 7 (to drive LEDs for example), driven high and low, no pull-up resistor, no pull-down resistor
    • Secure I/O lines 16 to 19 assigned to peripheral A functions with pull-up resistor
    • Non-Secure I/O lines 20 to 23 assigned to peripheral B functions with pull-down resistor
  • PIOB Configuration:
    • Four input signals on Secure I/O lines 0 to 3 (to read push-button states for example), with pull-up resistors, glitch filters and input change interrupts
    • Four input signals on Non-Secure I/O lines 12 to 15 to read an external device status (polled, thus no input change interrupt), no pull-up resistor, no glitch filter
    • Secure I/O lines 16 to 23 assigned to peripheral B functions with pull-down resistor
    • Non-Secure I/O lines 24 to 27 assigned to peripheral D with Input Change Interrupt, no pull-up resistor and no pull-down resistor
      Table 36-3. Programming Example
      Action Register Value to be Written
      PIOA: Set I/O lines 0 to 3 and 16 to 19 as Secure S_PIO_SIOSR0

      (offset 0x1034)

      		 0x000F000F
      PIOA: Set I/O lines 4 to 7 and 20 to 23 as Non-Secure S_PIO_SIONR0

      (offset 0x1030)

      		 0x00F000F0
      PIOA: 4-bit output port on Secure I/O lines 0 to 3, open-drain, with pull-up resistor S_PIO_MSKR0

      (offset 0x1000)

      		 0x0000000F
      S_PIO_CFGR0

      (offset 0x1004)

      		 0x00004300
      PIOA: Four output signals on Non-Secure I/O lines 4 to 7 (to drive LEDs for example), driven high and low, no pull-up resistor, no pull-down resistor PIO_MSKR0

      (offset 0x0)

      		 0x000000F0
      PIO_CFGR0

      (offset 0x4)

      		 0x00000100
      PIOA: Secure I/O lines 16 to 19 assigned to peripheral A functions with pull-up resistor S_PIO_MSKR0

      (offset 0x1000)

      		 0x000F0000
      S_PIO_CFGR0

      (offset 0x1004)

      		 0x00000201
      PIOA: Non-Secure I/O lines 20 to 23 assigned to peripheral B functions with pull-down resistor PIO_MSKR0

      (offset 0x0)

      		 0x00F00000
      PIO_CFGR0

      (offset 0x4)

      		 0x00000402
      PIOB: Set I/O lines 0 to 3 and 16 to 23as Secure S_PIO_SIOSR1

      (offset 0x1074)

      		 0x00FF000F
      PIOB: Set I/O lines 12 to 15 and 24 to 27 as Non-Secure S_PIO_SIONR1

      (offset 0x1070)

      		 0x0F00F000
      PIOB: Four input signals on Secure I/O lines 0 to 3 (to read push-button states for example), with pull-up resistors, glitch filters and interrupts on rising edge S_PIO_MSKR1

      (offset 0x1040)

      		 0x0000000F
      S_PIO_CFGR1

      (offset 0x1044)

      		 0x01001200
      PIOB: Four input signals on Non-Secure I/O line 12 to 15 to read an external device status (polled, thus no input change interrupt), no pull-up resistor, no glitch filter PIO_MSKR1

      (offset 0x40)

      		 0x0000F000
      PIO_CFGR1

      (offset 0x44)

      		 0x01001200
      PIOB: Secure I/O lines 16 to 23 assigned to peripheral B functions with pull-down resistor S_PIO_MSKR1

      (offset 0x1040)

      		 0x00FF0000
      S_PIO_CFGR1

      (offset 0x1044)

      		 0x00000402
      PIOB: Non-Secure I/O line 24 to 27 assigned to peripheral D with Input Interrupt on both edges, no pull-up resistor and no pull-down resistor PIO_MSKR1

      (offset 0x40)

      		 0x0F000000
      PIO_CFGR1

      (offset 0x44)

      		 0x02000004
      PIOB: Enable interrupt S_PIO_IER1

      (offset 0x1060)

      		 0x0000000F
      PIO_IER1

      (offset 0x60)

      		 0x0F000000