63.7.8 USART Asynchronous and Partial Wakeup

Asynchronous and partial wakeup is a means of data preprocessing that qualifies an incoming event, thus allowing the USART to decide whether or not to wake up the system. This operating mode is used primarily when the system is in ULP1 mode (refer to the section “Power Management Controller (PMC)" for more details) but can also be enabled when the system is fully running. In any case, only the peripheral clock is modified and VDDCORE always remains active.

Asynchronous and partial wakeup requires the USART module to be programmed in UART (FLEX_US_MR.SYNC = 0).

The maximum baud rate that can be achieved when asynchronous and partial wakeup is enabled is 1200.

The FLEX_US_RHR register must be read before enabling the asynchronous and partial wakeup.

When asynchronous and partial wakeup is enabled for the USART (refer to the section “Power Management Controller (PMC)"), the PMC decodes a clock request from the USART. The request is generated as soon as there is a falling edge on the RXD line as this may indicate the beginning of a start bit. If the system is in ULP1 mode (processor and peripheral clocks switched off), the PMC restarts the fast RC oscillator and provides the clock only to the USART.

As soon as the clock is provided by the PMC, the USART processes the received frame and compares the received character with VAL1 and VAL2 in FLEX_US_CMPR.

The USART instructs the PMC to disable the clock if the received character value does not meet the conditions defined by VAL1 and VAL2 fields in FLEX_US_CMPR (see figure Asynchronous Event Generating Only Partial Wakeup).

If the received character value meets the conditions, the USART instructs the PMC to exit the system from ULP1 mode (see figure Asynchronous Wakeup Use Case Examples).

The VAL1 and VAL2 fields can be programmed to provide different comparison methods and thus matching conditions.

• If VAL1 equals VAL2, then the comparison is performed on a single value and the wakeup is triggered if the received character equals VAL1.
• If VAL1 is strictly lower than VAL2, then any value between VAL1 and VAL2 wakes up the system.
• If VAL1 is strictly higher than VAL2, then the flag CMP is set to 1 if any received character equals VAL1 or VAL2.
• If VAL1 = 0 and VAL2 = 511, the wakeup is triggered as soon as a character is received.

The matching condition can be configured to include the parity bit (FLEX_US_CMPR.CMPPAR). Thus, if the received data matches the comparison condition defined by VAL1 and VAL2 but a parity error is encountered, the matching condition is cancelled and the UART instructs the PMC to disable the clock (see figure Asynchronous Event Generating Only Partial Wakeup).

If the processor and peripherals are running, the USART can be configured in Asynchronous and Partial Wakeup mode by enabling the PMC_SLPWK_ER (refer to the section “Power Management Controller (PMC)"). When activity is detected on the receive line, the USART requests the clock from the PMC and the comparison is performed. If there is a comparison match, the USART continues to request the clock. If there is no match, the clock is switched off for the USART only, until a new activity is detected.

The CMPMODE configuration has no effect when Asynchronous and Partial Wakeup mode is enabled for the USART (refer to PMC_SLPWK_ER in the section “Power Management Controller (PMC)").

When the system is in Active mode and the USART enters Asynchronous and Partial Wakeup mode, the flag RXRDY must be programmed as the unique source of the USART interrupt.

When the system exits ULP1 mode as the result of a matching condition, the RXRDY flag is used to determine if the USART is the source for the exit from ULP1 mode.