58.2 Embedded Characteristics

Host DMA Interface
Supports Monitoring of up to 4 Non-Contiguous Memory Regions
Supports Block Gathering Using Linked Lists
Supports Secure Hash Algorithm (SHA1, SHA224, SHA256)
Compliant with FIPS Publication 180-2
Configurable Processing Period:
- When SHA1 algorithm is processed, the runtime period is either 85 or 209 clock cycles.
- When SHA256 or SHA224 algorithm is processed, the runtime period is either 72 or 194 clock cycles.
Programmable Bus Burden
Register Write Protection

The online versions of the documents are provided as a courtesy. Verify all content and data in the device’s PDF documentation found on the device product page.