60.6.4.1 Principle

To avoid data remanence in the memory, the 5 Kbytes of SRAM are periodically reverted. The following two mechanisms are used:

1. When enabled, the non-imprinting circuitry periodically reads-inverts-writes each word of the SRAM. The inversion state of each word is stored in the memory.
2. When the processor writes data into memory, it is pseudo-randomly chosen so that either the right or the reverted data is written. The selected inversion state is stored at the same time.

The full non-imprinting process needs 2560 ICLK cycles to complete.