8.1 Atmel AVR XMEGA OCD

OCD and clocking

When the MCU enters stopped mode, the OCD clock is used as MCU clock. The OCD clock is either the JTAG TCK if the JTAG interface is being used, or the PDI_CLK if the PDI interface is being used.

The Atmel AVR Dragon does not offer a variable clock rate for AVR XMEGA targets.

SDRAM refresh in stopped mode

When the OCD is in stopped mode, the MCU is clocked by the PDI or JTAG clock, as described in the paragraph above. Since nothing is known of this frequency by the debugger or OCD, a low refresh period (0x10) is automatically used. This value can't be changed by the user.

I/O modules in stopped mode

Unlike most Atmel megaAVR devices, in AVR XMEGA the I/O modules are stopped in stop mode. This means that USART transmissions will be interrupted, timers (and PWM) will be stopped.

Hardware breakpoints

There are four hardware breakpoint comparators - two address comparators and two value comparators. They have certain restrictions:

• All breakpoints must be of the same type (program or data)

• All data breakpoints must be in the same memory area (I/O, SRAM, or XRAM)

• There can only be one breakpoint if address range is used

Here are the different combinations that can be set:

• Two single data or program address breakpoints

• One data or program address range breakpoint

• Two single data address breakpoints with single value compare

• One data breakpoint with address range, value range, or both

External reset and PDI physical

The PDI physical interface uses the reset line as clock. While debugging, the reset pullup should be 10kΩ or higher, or be removed altogether. Any reset capacitors should be removed. Other external reset sources should be disconnected.