24.5.5 Synchronization

Due to asynchronicity between the main clock domain and the peripheral clock domains, some registers need to be synchronized when written or read:

The following bits and registers are write-synchronized:

• Software Reset bit in Control A register (CTRLA.SWRST)
• Enable bit in Control A register (CTRLA.ENABLE)

Required write synchronization is denoted by the "Write-Synchronized" property in the register description.