21.7.1 Reset Cause
| Name: | RCAUSE |
| Offset: | 0x00 |
| Property: | – |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| BACKUP | SYST | WDT | EXT | NVM | BOD33 | BOD12 | POR | ||
| Access | R | R | R | R | R | R | R | R | |
| Reset | x | x | x | x | x | x | x | x |
Bit 7 – BACKUP Backup Reset
This bit is set if either a Backup or Hibernate Reset has occurred. Refer to BKUPEXIT register to identify the source of the Backup Reset.
Bit 6 – SYST System Reset Request
This bit is set if a System Reset Request has occurred. Refer to the Cortex processor documentation for more details.
Bit 5 – WDT Watchdog Reset
This bit is set if a Watchdog Timer Reset has occurred.
Bit 4 – EXT External Reset
This bit is set if an external Reset has occurred.
Bit 3 – NVM NVM Reset
This bit is set if an NVM Reset has occurred.
Bit 2 – BOD33 Brown Out 33 Detector Reset
This bit is set if a BOD33 Reset has occurred.
Bit 1 – BOD12 Brown Out 12 Detector Reset
This bit is set if a BOD12 Reset has occurred.
Bit 0 – POR Power On Reset
This bit is set if a POR has occurred.