23.8.14 Tamper Control

Name: TAMPCTRL
Offset: 0x60
Reset: 0x00000000
Property: PAC Write-Protection, Enable-Protected

Bit 3130292827262524 
    DEBNC4DEBNC3DEBNC2DEBNC1DEBNC0 
Access  
Reset 00000 
Bit 2322212019181716 
    TAMLVL4TAMLVL3TAMLVL2TAMLVL1TAMLVL0 
Access  
Reset 00000 
Bit 15141312111098 
       IN4ACT[1:0] 
Access  
Reset 00 
Bit 76543210 
 IN3ACT[1:0]IN2ACT[1:0]IN1ACT[1:0]IN0ACT[1:0] 
Access  
Reset 00000000 

Bits 24, 25, 26, 27, 28 – DEBNCn Debounce Enable of Tamper Input INn [n=0..3]

Note: Debounce feature does not apply to the Active Layer Protection mode (TAMPCTRL.INACT = ACTL).
ValueDescription
0 Debouncing is disabled for Tamper input INn
1 Debouncing is enabled for Tamper input INn

Bits 16, 17, 18, 19, 20 – TAMLVLn Tamper Level Select of Tamper Input INn [n=0..3]

Note: Tamper Level feature does not apply to the Active Layer Protection mode (TAMPCTRL.INACT = ACTL).
ValueDescription
0 A falling edge condition will be detected on Tamper input INn.
1 A rising edge condition will be detected on Tamper input INn.

Bits 0:1, 2:3, 4:5, 6:7, 8:9 – INnACT Tamper Channel n Action [n=0..3]

These bits determine the action taken by Tamper Channel n.
ValueNameDescription
0x0 OFF Off (Disabled)
0x1 WAKE Wake and set Tamper flag
0x2 CAPTURE Capture timestamp and set Tamper flag
0x3 ACTL Compare RTC signal routed between INn and OUT pins . When a mismatch occurs, capture timestamp and set Tamper flag