13.11.3 32-bit Cyclic Redundancy Check CRC32
The DSU unit provides support for calculating a cyclic redundancy check (CRC32) value for a memory area (including Flash and AHB RAM).
The algorithm employed is the industry standard CRC32 algorithm using the generator polynomial 0xEDB88320 (reversed representation).
When the CRC32 command is issued from:
- The internal range, the CRC32 can be operated at any memory location
- The external range, the CRC32 operation is restricted; DATA, ADDR, and LENGTH values are forced (see below)
| AMOD[1:0] | Short name | External range restrictions |
|---|---|---|
| 0 | ARRAY | CRC32 is restricted to the full Flash array area (Smart EEPROM emulation area not included) DATA forced to 0xFFFFFFFF before calculation (no seed) |
| 1 | EEPROM | CRC32 of the whole Smart EEPROM emulation area DATA forced to 0xFFFFFFFF before calculation (no seed) |
| 2-3 | Reserved |
Important: The NVM Cache must be always enabled when performing a DSU CRC32
request targeting the NVM memory space (ARRAY and EEPROM).