4.2 Crystal Oscillator

The XTO is an amplitude-regulated Pierce oscillator with internal load capacitances on the XTAL1 and XTAL2 pins of 14 ± 0.7 pF. For more details, refer to the ATA8210/ATA8215 UHF ASK/FSK Receiver Data Sheet (9344E), section 4, parameter number 14.10. The capacitance accuracy of ±0.7 pF is determined by the FETN4.CTN[3:0] register, which is copied from the factory-locked EEPROM during system initialization. Due to additional board parasitics of about 1 pF on each side, the total capacitance for C_L1 and C_L2 amounts to 15 ± 0.7 pF, and the load capacitance specification C_L for the crystal is 7.5 pF.

The crystal oscillator is enabled if the RF front-end register FEEN1.XTOEN is set to ‘1’. The AVCC voltage must be switched on with SUPCR.AVEN set to ‘1’ and the starting time of the AVCC supply regulator taken into account.

After the crystal oscillator output amplitude has reached a defined level, the RF front-end status register FESR.XRDY bit is set to ‘1’ by the XTO. The XTO clock is, then, available for the fractional-N PLL and the AVR.

The XTO oscillation frequency f_XTO is the reference frequency for the fractional N PLL. When designing the system in terms of receive and transmit frequency offset, the accuracy of the crystal and the XTO must be considered as well.

The additional pulling of the XTO is lower than ±10 ppm for a motional capacitance of C_m = 4 fF, including the integrated load capacitors. If the initial tolerance is compensated by the fractional-N PLL, a pulling due to temperature and supply voltage of ±4 ppm remains. For more details, refer to the ATA8210/ATA8215 UHF ASK/FSK Receiver Data Sheet (9344E), section 4, parameter numbers 13.40 and 13.50.

The XTO frequency depends on the XTAL properties and the integrated load capacitances C_L1,2 at the XTAL1 and XTAL2 pins. The pulling, P, of the f_XTO from the nominal frequency f_XTAL is calculated using the following formula:

P = \frac{C_{m}}{2} \times \frac{C_{L N} - C_{L}}{(C_{0} + C_{L N}) \times (C_{0} + C_{L N})} \times 10^{6} p p m (10)

C_m is the crystal motional capacitance, C₀ the shunt capacitance and C_LN the nominal load capacitance of the XTAL indicated in the data sheet of the applied quartz. C_L is the total actual load capacitance of the crystal in the circuit and consists of C_L1 and C_L2 in series connection (see the following figure).

For the ATA8210/15, the pulling P amounts from -9.3 ppm to +10.1 ppm using the following values:

C_m = 4 fF
C₀ = 1.0 pF
C_LN = 7.5 pF
C_L1,2 = 15 pF ± 0.7 pF

To ensure proper start-up behavior of the XTO, the small signal gain and the negative resistance provided by the XTO at start-up is very large. For example, the oscillation starts up even in a worst-case scenario with a crystal series resistance of 950Ω at C₀ ≤ 1 pF. An approximation of the negative resistance experienced by the crystal is:

Re {Z_{x t o c o r e}} = Re {\frac{Z_{1} \times Z_{3} + Z_{2} \times Z_{3} + Z_{1} \times Z_{2} \times Z_{3} \times g_{m}}{Z_{1} + Z_{2} + Z_{3} + Z_{1} \times Z_{2} \times g_{m}}} (11)

Z₁, Z₂ are complex impedances at the XTAL1 and XTAL2 pins; therefore,

Z₁ = -j/(2 x π x f_XTO x C_L1) + 5Ω and Z₂= -j/(2 x π x f_XTO x C_L2) + 5Ω

Z₃ consists of C₀ in parallel with an internal 180 kΩ resistor; therefore, Z₃ = -j/(2 x π x f_XTO x C₀) // 180 kΩ

gm is the internal transconductance between XTAL1 and XTAL2 with typically 40 ms at 25°C during start-up.

With f_XTO= 24.305 MHz, gm = 40 ms, C_L= 7.5 pF, C₀= 1 pF, a typical negative resistance of about -1,300Ω can be reached. The worst case value of the negative resistance within technological, supply voltage and temperature variations is always below -950Ω at Tamb = 105℃ and -1,100Ω at Tamb = 85℃ for C₀ ≤ 1pF. For more details, refer to the ATA8210/ATA8215 UHF ASK/FSK Receiver Data Sheet (9344E), section 4, parameter numbers 13.80 and 13.90.

Due to the large gain at start-up, the XTO is able to achieve very high start-up speed. The oscillation start-up time can be estimated with the small signal time constant, τ.

τ = \frac{2}{4 \times π^{2} \times f_{m} 2 \times C_{m} \times (| Re (Z_{x t o c o r e}) | - R_{m})} (12)

After about 11τ, an amplitude detector detects the oscillation amplitude and sets FESR.XRDY to ‘1’ if the amplitude has reached a defined value.

Microchip recommends using a crystal with C_m = 4 fF to 10 fF, C_LN = 8 pF, R_m < 110Ω and C₀ = 1.0-2 pF.

Lower values of C_m increase the start-up time and influence the system timings; whereas, higher values of C_m (up to 10 fF) increase the pulling.

Higher values of C₀ reduce the negative resistance experienced by the crystal. Care must, therefore, be taken on the additional PCB capacitance between XTAL1 and XTAL2, and a crystal with low C₀ must be chosen.

The ATA8210/15 crystal oscillator is a low-power design. A large start current is applied to the XTO core transistor enabling a start-up with up to 1100Ω cold-start resistance at T_amb= 85°C. For more details, refer to the ATA8210/ATA8215 UHF ASK/FSK Receiver Data Sheet (9344E), section 4, parameter number 13.90. After a successful start-up, the current is reduced and the maximum achievable series resistance is, thus, reduced to 110Ω. For more details, refer to the ATA8210/ATA8215 UHF ASK/FSK Receiver Data Sheet (9344E), section 4, parameter number 14.00.

In summary, the following front-end register settings are affected by the XTO:

FEEN1. XTOEN – Enables/disables the XTO
FESR.XRDY – Indication that the XTO is ready and using it as system clock source
FETN4.CTN4[3:0] – Calibration value for internal XTO load capacitance