4.5 Data and Support FIFOs

The ATA8210/15 integrates two hardware buffers, a 32-byte deep Data FIFO (DFIFO) and a 16-byte deep Support FIFO (SFIFO). Use the DFIFO as a data buffer in buffered receive modes while the SFIFO serves as a buffer for the RSSI values in Receive mode.

The following figure shows a diagram of the DFIFO and SFIFO block-level interconnections.

Figure 4-21. DFIFO and SFIFO System View