18.4.6 PMD Control Register 5
| Name: | PMD5 |
| Offset: | 0x067 |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| CLC8MD | CLC7MD | CLC6MD | CLC5MD | DMA4MD | TU16BMD | TU16AMD | |||
| Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | ||
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
Bits 4, 5, 6, 7 – CLCnMD Disable CLCn
| Value | Description |
|---|---|
| 1 | CLCn module disabled |
| 0 | CLCn module enabled |
Bit 3 – DMAnMD Disable DMAn
| Value | Description |
|---|---|
| 1 | DMAn module disabled |
| 0 | DMAn module enabled |
Bit 2 – TU16BMD Disable Universal Timer UT16B
| Value | Description |
|---|---|
| 1 | UT16B module disabled |
| 0 | UT16B module enabled |
Bit 1 – TU16AMD Disable Universal Timer UT16A
| Value | Description |
|---|---|
| 1 | UT16A module disabled |
| 0 | UT16A module enabled |