23.3.3 Interrupts and DMA Triggers

The MVIO module has four edge-triggered interrupts in the PIRx registers. An interrupt request is generated when the corresponding interrupt source has been enabled and when the interrupt flag is set. The interrupt request remains active until the interrupt flag has been cleared in hardware when the interrupt condition is no longer met. Refer to the “VIC - Vectored Interrupt Controller Module” chapter for more information.

These system level interrupts also act as DMA triggers. The interrupt does not need to be enabled to be used as a trigger for DMA transfers. Refer to section “Types of Hardware Triggers” in the “DMA – Direct Memory Access” chapter for more information on how to use these DMA triggers.

The VDDIOxPORRIF and VDDIOxPORFIF interrupt flags of the PIRx registers are used to monitor the status of the VDDIOx Power-On Reset (POR) state, while the VDDIOxLVDRIF and VDDIOxLVDFIF interrupt flags are used to monitor the VDDIOx Low Voltage detect state.

The VDDIOxPORRIF will be set when the integrated I/O monitor circuitry enters the POR state and detects that the MVIO supply does not meet or exceed the minimum specified voltage requirements for the module to operate properly. Once the integrated I/O voltage monitors detect that the VDDIOx domains are fully powered up and that the proper voltage level thresholds are being met for the MVIO module to function properly, the VDDIOxPORFIF interrupt flag and RDY status bits will be set.
When the VDDIOx Low-Voltage detection circuit is enabled using the LVDEN bit and the voltage threshold level has been set using the LVD bits, and the corresponding VDDIOx supply voltage drops below the configured LVD threshold during normal operation, the VDDIOxLVDRIF of the PIRx register will be set. Once the VDDIOx supply voltage recovers and is no longer lower than the LVD threshold, the VDDIOxLVDFIF will be set. The LVDSTAT bit can be used to monitor the status of the LVD detection circuitry in software.