51.2 Embedded Characteristics

  • 12-bit Resolution up to 16-bit Resolution by Digital Averaging
  • Wide Range of Power Supply Operation
  • Selectable Single-ended or Differential Input Voltage
  • Selectable Single or Dual Sample-and-Hold Mode
  • Programmable Gain for Maximum Full-Scale Input Range 0–VDD
  • Programmable Offset Per Channel
  • Automatic Correction of Offset and Gain Errors
  • Integrated Multiplexers Offering Up to 12 Independent Analog Inputs
  • Individual Enable and Disable of Each Channel
  • Hardware or Software Trigger
    • External trigger pin
    • Timer counter outputs (corresponding TIOA trigger)
    • PWM event line
  • Drive of PWM Fault Input
  • DMA Support
  • Possibility of AFE Timings Configuration
  • Two Sleep Modes and Conversion Sequencer
    • Automatic wakeup on trigger and back to sleep mode after conversions of all enabled channels
    • Possibility of customized channel sequence
  • Standby Mode for Fast Wakeup Time Response
    • Powerdown capability
  • Automatic Window Comparison of Converted Values
  • Register Write Protection