5.4 Erase Operation (ERASE)
The ERASE instruction programs all bits in the specified memory location
to the logic ‘1’ state. The self-timed erase cycle starts once the
ERASE instruction and address are decoded. The DO pin outputs the
Ready/Busy status of the part if CS is brought high after being kept low for a minimum of
tCS. A logic ‘1’ at the DO pin indicates that the selected
memory location has been erased and the part is ready for another instruction.