5.1 READ

The READ instruction contains the address code for the memory location to be read. After the instruction and address are decoded, data from the selected memory location are available at the DO pin. Output data changes are synchronized with the rising edges of the SK pin. The AT93C56B/AT93C66B supports sequential read operations. The device will automatically increment the internal Address Pointer and clock out the next memory location as long as Chip Select (CS) is held high. In this case, the dummy bit (Logic ‘0’) will not be clocked out between memory locations, thus allowing for a continuous stream of data to be read.