7.1 Byte Write

A byte write requires the following sequence and is depicted in Figure 7-1. After the CS line is pulled low to select the device, the WRITE (02h) instruction is transmitted via the SI line followed by the 16‑bit address and the data (D7‑D0) to be programmed. Programming will start after the CS pin is brought high. The low‑to‑high transition of the CS pin must occur during the SCK low time (Mode 0) and SCK high time (Mode 3) immediately after clocking in the D0 (LSB) data bit. The AT25080B/AT25160B/AT25320B/AT25640B is automatically returned to the Write Disable state (STATUS register bit WEL = 0) at the completion of a write cycle.

Figure 7-1. Byte Write
Note:
  1. This instruction initiates a self-timed internal write cycle (tWC) on the rising edge of CS after a valid sequence.