1 Introduction

An analog to digital converter (ADC) converts a voltage signal as input to a digital signal in a number of bits that depends on ADC resolution. Signals that are not available in voltage form, such as currents, are converted to a voltage signal before conversion to digital data. The digital signal output of the ADC that is relative to its bit width must be scaled to a value that can be properly interpreted by the system that processes the signal. The digital output of ADC can have intended or unintended offset. An intended offset is usually generated in current measurement to allow measurement of current in positive and negative direction. The offset is usually at half of the ADC digital output which can have deviations due to tolerances in the components used in analog signal processing circuit.

The ADC Scaling IP implements to basic operations. The IP computes the ADC offset value by averaging the first 8192 ADC samples after reset release. The IP then subtracts the offset value and scales the measurement to a per unit value. The ADC scaling should be chosen such that the rated current represents 65536 output.

Summary

Core VersionThis document applies to ADC scaling v4.3.
Supported Device Families
  • PolarFire® SoC
  • PolarFire
  • RTG4™
  • IGLOO® 2
  • SmartFusion® 2
Supported Tool FlowRequires Libero® SoC v11.8 or later releases.
LicensingComplete encrypted RTL code is provided for the core, enabling the core to be instantiated with SmartDesign. Simulation, Synthesis, and Layout can be performed with Libero software. ADC Scaling is licensed with encrypted RTL that must be purchased separately. For more information, see ADC Scaling.

Features

ADC scaling has the following key features:

  • Performs auto offset computation initially
  • Involves disabling PWM and triggering the ADC by a pre-determined number of times (8192) to determine ADC offset
  • Scales raw ADC data into per unit value

  • Detects over current fault after phase current computation, which can be used to stop the motors immediately

Implementation of IP Core in Libero Design Suite

IP core must be installed to the IP Catalog of the Libero SoC software. This is done automatically through the IP Catalog update function in the Libero SoC software, or the IP core can be manually downloaded from the catalog. Once the IP core is installed in the Libero SoC software IP Catalog, the core can be configured, generated, and instantiated within the SmartDesign tool for inclusion in the Libero project list.