16.14.9 RxyI2C

I²C Pad Rxy Control Register

Important:

Refer to the “Pin Allocation Table” for details about pin availability per port
Unimplemented bits will read back as ‘0’

Name:

RxyI2C


Bit	7	6	5	4	3	2	1	0
		SLEW	PU[1:0]				TH[1:0]
Access		R/W	R/W	R/W			R/W	R/W
Reset		0	0	0			0	0

Bit 6 – SLEW I²C Specific Slew Rate Limiting Control


Value	Description
`1`	I²C specific slew rate limiting is enabled. Standard pad slew limiting is disabled. The SLRxy bit is ignored
`0`	Standard GPIO Slew Rate; enabled/disabled via SLRxy bit

Bits 5:4 – PU[1:0] I²C Pull-Up Selection

Value	Description
11	Reserved
10	10x current of standard weak pull-up
01	2x current of standard weak pull-up
00	Standard GPIO weak pull-up, enabled via the WPUxy bit

Bits 1:0 – TH[1:0] I²C Input Threshold Selection

Value	Description
11	Reserved
10	SMBus 2.0 (2.1V) input threshold
01	I²C-specific input thresholds
00	Standard GPIO Input pull-up, enabled via the INLVLxy registers

Refer to the “Pin Allocation Table” for details about pin availability per portUnimplemented bits will read back as ‘0’

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