11.3.4 Access Control for IVTBASE Registers

The interrupt controller has an IVTLOCKED bit, which can be set to avoid inadvertent changes to the contents of IVTBASE. Setting and clearing this bit requires a special sequence as an extra precaution against inadvertent changes.

To allow writes to IVTBASE, the interrupts must be disabled (GIEH = 0) and the IVTLOCKED bit must be cleared. The user must follow the sequence shown below to clear the IVTLOCKED bit.

IVT Unlock Sequence

; Disable Interrupts:
    BCF INTCON0, GIE;

; Bank to IVTLOCK register
    BANKSEL IVTLOCK;
    MOVLW 55h;

; Required sequence, next 4 instructions
    MOVWF IVTLOCK;
    MOVLW AAh;
    MOVWF IVTLOCK;

; Clear IVTLOCKED bit to enable writes
    BCF IVTLOCK, IVTLOCKED;

; Enable Interrupts
    BSF INTCON0, GIE;

The user must follow the following sequence to set the IVTLOCKED bit.

IVT Lock Sequence

; Disable Interrupts:
    BCF INTCON0, GIE;

; Bank to IVTLOCK register
    BANKSEL IVTLOCK;
    MOVLW 55h;

; Required sequence, next 4 instructions
    MOVWF IVTLOCK;
    MOVLW AAh;
    MOVWF IVTLOCK;

; Set IVTLOCKED bit to enable writes
    BSF IVTLOCK, IVTLOCKED;

; Enable Interrupts
    BSF INTCON0, GIE;

When the IVT1WAY Configuration bit is set, the IVTLOCKED bit can be cleared and set only once after a device Reset. The unlock operation will have no effect after the lock sequence is used to set the IVTLOCKED bit. Unlocking is inhibited until a system Reset occurs.