27.5.5 Advanced Features

SleepWalking is the capability for a device to temporarily wake up clocks for a peripheral to perform a task without waking up the CPU from Standby sleep mode. At the end of the sleepwalking task, the device can either be awakened by an interrupt (from a peripheral involved in SleepWalking) or enter again into Standby sleep mode.

In Standby when Sleepwalking is ongoing:

• All the power domains are turned ON including PDRAM power domain
• Low power mode of the regulators is not activated during sleepwalking

As shown in the following figure, total wake-up time depends on:

1. Latency due to Reference and Regulator effect.
2. Latency due to Power Domain Gating:

   Usually, wake-up time is measured with the assumption that the power domains are already in active state. When using Power Domain Gating, changing a power domain from OFF to active state will take a certain time, refer to Electrical Characteristics. If all power domains were already in active state in standby sleep mode, this latency is zero.

3. Latency due to the CPU clock source wake-up time.
4. Latency due to the NVM wakeup time from deep power down mode.