48.5.2.1 Clocks
The TRAM bus clock (CLK_TRAM_APB) can be enabled and disabled in the Main Clock module, and the default state of CLK_TRAM_APB can be found in the Peripheral Clock Masking section.
The TRAM bus clock (CLK_TRAM_APB) can be enabled and disabled in the Main Clock module, and the default state of CLK_TRAM_APB can be found in the Peripheral Clock Masking section.
The online versions of the documents are provided as a courtesy. Verify all content and data in the device’s PDF documentation found on the device product page.