53.4 MCU Standby Power

Table 53-5. MCU standby Current Consumption DC Electrical Specifications
DC CHARACTERISTICS				Standard Operating Conditions: VDDREG = VDDIO = AVDD 1.71V to 3.63V (unless otherwise stated) Operating temperature: -40°C ≤ TA ≤ +125°C for Extended Temp
Param. No.	Symbol	Characteristics	Power Pin	Typ.⁽¹⁾	Max.	Units	Conditions
SPWR_1	IDD_STANDBY ⁽²⁾	MCU IDD in Standby mode w/VDDCORE_x = 0.8V	VDDIO = AVDD = 3.3V	0.5	0.9	mA	Full System RAM retained (PM.STDBYCFG.RAMCFG = 0x0), RAM Low= Power mode disabled (PM.STDBYCFG.LPRAM = 0x0), Voltage Regulators Low Voltage enabled (SUPC.VREGCTRL.LVSTDBY = 0x1)
SPWR_3			VDDREG = 3.3V	1.5	22	mA
SPWR_5			VDDIO = AVDD = 3.3V	0.5	0.9	mA	32 Kb System RAM retained (PM.STDBYCFG.RAMCFG = 0x1), RAM Low- Power mode disabled (PM.STDBYCFG.LPRAM = 0x0), Voltage Regulators Low Voltage enabled (SUPC.VREGCTRL.LVSTDBY = 0x1)
SPWR_7			VDDREG = 3.3V	1.5	20	mA
SPWR_9			VDDIO = AVDD = 3.3V	0.5	0.9	mA	Full System RAM retained (PM.STDBYCFG.RAMCFG = 0x0), RAM Low= Power mode enabled (PM.STDBYCFG.LPRAM = 0x1), Voltage Regulators Low Voltage enabled (SUPC.VREGCTRL.LVSTDBY = 0x1)
SPWR_11			VDDREG = 3.3V	1.5	19	mA
SPWR_13		MCU IDD in Standby mode w/VDDCORE_x = 1.2V	VDDIO = AVDD = 3.3V	0.5	1	mA	Full System RAM retained (PM.STDBYCFG.RAMCFG = 0x0), RAM Low Power mode disabled (PM.STDBYCFG.LPRAM = 0x0), Voltage Regulators Low Voltage disabled (SUPC.VREGCTRL.LVSTDBY = 0x0)
SPWR_15			VDDREG = 3.3V	1.5	38	mA
SPWR_17			VDDIO = AVDD = 3.3V	0.5	1	mA	32 Kb System RAM retained (PM.STDBYCFG.RAMCFG = 0x1), RAM Low- Power mode disabled (PM.STDBYCFG.LPRAM = 0x0), Voltage Regulators Low Voltage disabled (SUPC.VREGCTRL.LVSTDBY = 0x0)
SPWR_19			VDDREG = 3.3V	1.5	36	mA
SPWR_21			VDDIO = AVDD = 3.3V	0.5	1	mA	Full System RAM retained (PM.STDBYCFG.RAMCFG = 0x0), RAM Low- Power mode enabled (PM.STDBYCFG.LPRAM = 0x1), Voltage Regulators Low Voltage disabled (SUPC.VREGCTRL.LVSTDBY = 0x0)
SPWR_23			VDDREG = 3.3V	1.5	35	mA
Note: Typical values at 25°C only. Conditions: No peripheral modules are operating, unless specified (i.e. all peripherals inactive) APB Peripheral bus clocks: default settings after reset CMCC Cache disabled MCU is running on Flash with automatic wait state VREG_USB disabled I/Os are inactive input mode with input trigger disabled All clock generation sources disabled unless otherwise specified WDT, CFD Clock Fail Detect disabled

Operating CONDITIONS

VDDIO = 3.3V
VDDCORE = 0.8V

Figure 53-3. Power Consumption over Temperature in STANDBY Mode, VDDCORE = 0.8V (Typical values for guidance only, not characterized over Process / voltage)

Operating CONDITIONS

VDDIO = 3.3V
VDDCORE = 1.2V

Figure 53-4. Power Consumption over Temperature in Standby Mode, VDDCORE = 1.2V (Typical values for guidance only, not characterized over Process/voltage)