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SAM L21 Family Data Sheet SAM L21
SAM L21 Family Data Sheet SAM L21
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  2. 15 DSU - Device Service Unit
  3. 15.11 Functional Description
  4. 15.11.2 Basic Operation
  5. 15.11.2.2 Operation From a Debug Adapter

SAM L21

  • Introduction
  • Features
  • 1 Description
  • 2 Configuration Summary
  • 3 Ordering Information
  • 4 Block Diagram
  • 5 Pinout
  • 6 Signal Descriptions List
  • 7 I/O Multiplexing and Considerations
  • 8 Analog Connections of Peripherals
  • 9 Power Supply and Start-Up Considerations
  • 10 Product Mapping
  • 11 Memories
  • 12 Processor and Architecture
  • 13 PAC - Peripheral Access Controller
  • 14 Peripherals Configuration Summary
  • 15 DSU - Device Service Unit
    • 15.1 Overview
    • 15.2 Features
    • 15.3 Block Diagram
    • 15.4 Signal Description
    • 15.5 Product Dependencies
    • 15.6 Debug Operation
    • 15.7 Chip Erase
    • 15.8 Programming
    • 15.9 Intellectual Property Protection
    • 15.10 Device Identification
    • 15.11 Functional Description
      • 15.11.1 Principle of Operation
      • 15.11.2 Basic Operation
        • 15.11.2.1 Initialization
        • 15.11.2.2 Operation From a Debug Adapter
        • 15.11.2.3 Operation From the CPU
      • 15.11.3 32-bit Cyclic Redundancy Check CRC32
      • 15.11.4 Debug Communication Channels
      • 15.11.5 Testing of On-Board Memories MBIST
      • 15.11.6 System Services Availability when Accessed Externally
    • 15.12 Register Summary
    • 15.13 Register Description
  • 16 Clock System
  • 17 GCLK - Generic Clock Controller
  • 18 MCLK – Main Clock
  • 19 RSTC – Reset Controller
  • 20 PM – Power Manager
  • 21 OSCCTRL – Oscillators Controller
  • 22 OSC32KCTRL – 32KHz Oscillators Controller
  • 23 SUPC – Supply Controller
  • 24 WDT – Watchdog Timer
  • 25 RTC – Real-Time Counter
  • 26 DMAC – Direct Memory Access Controller
  • 27 EIC – External Interrupt Controller
  • 28 NVMCTRL – Non-Volatile Memory Controller
  • 29 PORT - I/O Pin Controller
  • 30 EVSYS – Event System
  • 31 SERCOM – Serial Communication Interface
  • 32 SERCOM USART – SERCOM Universal Synchronous and Asynchronous Receiver and Transmitter
  • 33 SERCOM SPI – SERCOM Serial Peripheral Interface
  • 34 SERCOM I2C – SERCOM Inter-Integrated Circuit
  • 35 TC – Timer/Counter
  • 36 TCC – Timer/Counter for Control Applications
  • 37 TRNG – True Random Number Generator
  • 38 AES – Advanced Encryption Standard
  • 39 USB – Universal Serial Bus
  • 40 CCL – Configurable Custom Logic
  • 41 Operational Amplifier Controller (OPAMP)
  • 42 ADC – Analog-to-Digital Converter
  • 43 AC – Analog Comparators
  • 44 DAC – Digital-to-Analog Converter
  • 45 PTC - Peripheral Touch Controller
  • 46 Electrical Characteristics
  • 47 Electrical Characteristics - Extended Temperature Range 105°C
  • 48 Typical Characteristics
  • 49 Appendix A
  • 50 Packaging Information
  • 51 Schematic Checklist
  • 52 Conventions
  • 53 Acronyms and Abbreviations
  • 54 Datasheet Revision History
  • Microchip Information

15.11.2.2 Operation From a Debug Adapter

Debug adapters should access the DSU registers in the external address range 0x100 – 0x2000. If the device is protected by the NVMCTRL security bit, accessing the first 0x100 bytes causes the system to return an error. Refer to Intellectual Property Protection.

References:

NVMCTRL – Non-Volatile Memory Controller

Security Bit

The online versions of the documents are provided as a courtesy. Verify all content and data in the device’s PDF documentation found on the device product page.

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