0x00 | OFF | No
debouncing. Input pin is low or high level sensitive depending on its
WKPOLx bit. |
0x01 | 2CK32 | Input
pin shall be active for at least two 32KHz clock periods. |
0x02 | 3CK32 | Input
pin shall be active for at least three 32KHz clock periods. |
0x03 | 32CK32 | Input
pin shall be active for at least 32 32KHz clock periods. |
0x04 | 512CK32 | Input
pin shall be active for at least 512 32KHz clock periods. |
0x05 | 4096CK32 | Input
pin shall be active for at least 4096 32KHz clock periods. |
0x06 | 32768CK32 | Input
pin shall be active for at least 32768 32KHz clock periods. |
0x07 | - | Reserved |