20.6.1.2 Power Domains

In addition to the supply domains, such as VDDIO, VDDIN and VDDANA, the device provides these power domains:
  • PD0, PD1, PD2
  • PDTOP
  • PDBACKUP

The PD0, PD1 and PD2 are "switchable power domains". In standby or backup sleep mode, they can be turned off to save leakage consumption according to user configuration.

The three peripheral domains, PD0, PD1, and PD2, can be in retention state when none of the contained peripherals are required, but if a peripheral power domain PDn is powered, lower power domains will be powered, too. For example, if no peripherals are being used in PD2 and one or several peripherals in PD1 are active, then PD2 will be powered down, PD1 will be powered, and PD0 will automatically be powered, even if no peripheral is being used.

Figure 20-2. Power Domain Partitioning

Related Links:

Power Domain Overview

PD0

PD0 is the lowest Power Domain. It contains the Event System, the Generic Clock Controller, Oscillators Controller, the Main Clocks Controller. Additionally, PD0 contains a number of peripherals that allow the device to wake up from an interrupt: one SERCOM (SERCOM5), one Timer/Counter (TC4), ADC, AC, OPAMP, CCL, and the PTC. The PLL oscillator sources, DFLL48M and FDPLL96M, are in PD0 as well.

See also Power Domains.

This power domain will automatically be activated if either PD1 or PD2 are activated.

PD1

PD1 is the intermediate Power Domain. PD1 contains the DMA controller, the Peripheral Access Controller, and the Low Power Bus Matrix. It also contains the Timer/Counter for Control instances, the AES peripheral, the TRNG, the DAC and the low-power SRAM. PD1 contains the SERCOMs (except for SERCOM5, present in PD0), and the Timer Counters (except TC4, present in PD0).

When active, PD1 automatically activates PD0.

PD2

PD2 is the highest power domain. When activated, it will automatically activate both PD1 and PD0.

It contains the CM0+ core, the Non-Volatile Memory Controller, the Device Service Unit, USB, and the SRAM. See also Power Domains.

PDTOP

PDTOP contains all controllers located in the core domain. It is powered when in Active, Idle or Standby mode. It does not have a retention mode; it is either in an active state, or off. When in Backup or Off mode, this domain is completely powered down.

PDBACKUP

The Backup Power Domain (PDBACKUP) is always on, except in the off sleep mode. It contains the 32KHz oscillator sources, the Supply Controller, the Reset Controller, the Real Time Counter, and the Power Manager itself.