42.6.7 Sleep Mode Operation

The ONDEMAND and RUNSTDBY bits in the Control A register (CTRLA) control the behavior of the ADC during standby sleep mode, in cases where the ADC is enabled (CTRLA.ENABLE = 1). For further details on available options, refer to Table 42-4.

Note: When CTRLA.ONDEMAND=1, the analog block is powered-off when the conversion is complete. When a start request is detected, the system returns from sleep and starts a new conversion after the start-up time delay.
Table 42-4. ADC Sleep Behavior
CTRLA.RUNSTDBYCTRLA.ONDEMANDCTRLA.ENABLEDescription
xx0Disabled
001Run in all sleep modes except STANDBY.
011Run in all sleep modes on request, except STANDBY.
101Run in all sleep modes.
111Run in all sleep modes on request.