13.4.3 Clocks
The PAC bus clock (CLK_PAC_APB) can be enabled and disabled in the Main Clock module. The default state of CLK_PAC_APB can be found in the referenced links.
References:
The PAC bus clock (CLK_PAC_APB) can be enabled and disabled in the Main Clock module. The default state of CLK_PAC_APB can be found in the referenced links.
References:
The online versions of the documents are provided as a courtesy. Verify all content and data in the device’s PDF documentation found on the device product page.