41.7 Register Summary Register Summary
| Offset | Name | Bit Pos. | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|
| 0x00 | CTRLA | 7:0 | LPMUX | ENABLE | SWRST | |||||
0x01 | Reserved | |||||||||
| 0x02 | STATUS | 7:0 | READYx | READYx | READYx | |||||
0x03 ... 0x0403FF | Reserved | |||||||||
| 0x040400 | OPAMPCTRLx0 | 7:0 | ONDEMAND | RUNSTDBY | BIAS[1:0] | ANAOUT | ENABLE | |||
| 15:8 | POTMUX[2:0] | RES1MUX[1:0] | RES1EN | RES2VCC | RES2OUT | |||||
| 23:16 | MUXNEG[2:0] | MUXPOS[2:0] | ||||||||
| 31:24 | ||||||||||