35.7.3.13 Counter Value, 32-bit Mode

Note: Prior to any read access, this register must be synchronized by writing the according TC Command value to the Control B Set register (CTRLBSET.CMD = READSYNC).
Name: COUNT
Offset: 0x14
Reset: 0x00
Property: PAC Write-Protection, Write-Synchronized

Bit 3130292827262524 
 COUNT[31:24] 
Access R/WR/WR/WR/WR/WR/WR/WR/W 
Reset 00000000 
Bit 2322212019181716 
 COUNT[23:16] 
Access R/WR/WR/WR/WR/WR/WR/WR/W 
Reset 00000000 
Bit 15141312111098 
 COUNT[15:8] 
Access R/WR/WR/WR/WR/WR/WR/WR/W 
Reset 00000000 
Bit 76543210 
 COUNT[7:0] 
Access R/WR/WR/WR/WR/WR/WR/WR/W 
Reset 00000000 

Bits 31:0 – COUNT[31:0]  Counter Value

These bits contain the current counter value.