35.7.1 Register Summary - 8-bit Mode
Offset | Name | Bit Pos. | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
---|---|---|---|---|---|---|---|---|---|---|
0x00 | CTRLA | 7:0 | ONDEMAND | RUNSTDBY | PRESCSYNC[1:0] | MODE[1:0] | ENABLE | SWRST | ||
15:8 | ALOCK | PRESCALER[2:0] | ||||||||
23:16 | COPEN1 | COPEN0 | CAPTEN1 | CAPTEN0 | ||||||
31:24 | ||||||||||
0x04 | CTRLBCLR | 7:0 | CMD[2:0] | ONESHOT | LUPD | DIR | ||||
0x05 | CTRLBSET | 7:0 | CMD[2:0] | ONESHOT | LUPD | DIR | ||||
0x06 | EVCTRL | 7:0 | TCEI | TCINV | EVACT[2:0] | |||||
15:8 | MCEO1 | MCEO0 | OVFEO | |||||||
0x08 | INTENCLR | 7:0 | MC1 | MC0 | ERR | OVF | ||||
0x09 | INTENSET | 7:0 | MC1 | MC0 | ERR | OVF | ||||
0x0A | INTFLAG | 7:0 | MC1 | MC0 | ERR | OVF | ||||
0x0B | STATUS | 7:0 | CCBUFV1 | CCBUFV0 | PERBUFV | SLAVE | STOP | |||
0x0C | WAVE | 7:0 | WAVEGEN[1:0] | |||||||
0x0D | DRVCTRL | 7:0 | INVEN1 | INVEN0 | ||||||
0x0E | Reserved | |||||||||
0x0F | DBGCTRL | 7:0 | DBGRUN | |||||||
0x10 | SYNCBUSY | 7:0 | CC1 | CC0 | PER | COUNT | STATUS | CTRLB | ENABLE | SWRST |
15:8 | ||||||||||
23:16 | ||||||||||
31:24 | ||||||||||
0x14 | COUNT | 7:0 | COUNT[7:0] | |||||||
0x15 ... 0x1A | Reserved | |||||||||
0x1B | PER | 7:0 | PER[7:0] | |||||||
0x1C | CC0 | 7:0 | CC[7:0] | |||||||
0x1D | CC1 | 7:0 | CC[7:0] | |||||||
0x1E ... 0x2E | Reserved | |||||||||
0x2F | PERBUF | 7:0 | PERBUF[7:0] | |||||||
0x30 | CCBUF0 | 7:0 | CCBUF[7:0] | |||||||
0x31 | CCBUF1 | 7:0 | CCBUF[7:0] |