4.4.3 Program the Programming Executive

Storing the PE to executive memory is similar to normal programming of code memory. The executive memory must first be erased and then programmed using two-word writes (two instruction words). The control flow for this method is summarized in Figure 4-6.

Table 4-16 provides the ICSP programming processes for PE memory. To minimize programming time, the same packed data format that the PE uses is utilized. See Programming Executive Commands for more details on the packed data format.

Figure 4-6. Programming Executive Program Flow

Table 4-16. Programming the Programming Executive (Two-Word Latch Writes)
Command (Binary)	Data (Hex)	Description
Step 1: Exit the Reset vector.
`0000` `0000` `0000` `0000` `0000` `0000` `0000` `0000`	`000000` `000000` `000000` `040200` `000000` `000000` `000000`	`NOP` `NOP` `NOP` `GOTO 0x200` `NOP` `NOP` `NOP`
Step 2: Initialize the TBLPAG register for writing to the latches.
`0000` `0000`	`200FAC` `8802AC`	`MOV #0xFA, W12` `MOV W12, TBLPAG`
Step 3: Load W0:W2 with the next two packed instruction words to program.
`0000` `0000` `0000`	`2xxxx0` `2xxxx1` `2xxxx2`	`MOV #<LSW0>, W0` `MOV #<MSB1:MSB0>, W1` `MOV #<LSW1>, W2`
Step 4: Set the Read Pointer (W6) and the Write Pointer (W7), and load the write latches.
`0000` `0000` `0000` `0000` `0000` `0000` `0000` `0000` `0000` `0000` `0000` `0000` `0000` `0000` `0000` `0000`	`EB0300` `000000` `EB0380` `000000` `BB0BB6` `000000` `000000` `BBDBB6` `000000` `000000` `BBEBB6` `000000` `000000` `BB0B96` `000000` `000000`	`CLR W6` `NOP` `CLR W7` `NOP` `TBLWTL [W6++], [W7]` `NOP` `NOP` `TBLWTH.B [W6++], [W7++]` `NOP` `NOP` `TBLWTH.B [W6++], [++W7]` `NOP` `NOP` `TBLWTL.W [W6], [W7]` `NOP` `NOP`
Step 5: Set the NVMADRU/NVMADR register pair to point to the correct row.
`0000` `0000` `0000` `0000`	`2xxxx3` `2xxxx4` `884693` `8846A4`	`MOV #DestinationAddress<15:0>, W3` `MOV #DestinationAddress<23:16>, W4` `MOV W3, NVMADR` `MOV W4, NVMADRU`
Step 6: Set the NVMCON register to program two instruction words.
`0000` `0000` `0000` `0000` `0000`	`24001A` `000000` `88468A` `000000` `000000`	`MOV #0x4001, W10` `NOP` `MOV W10, NVMCON` `NOP` `NOP`
Step 7: Initiate the write cycle.
`0000` `0000` `0000` `0000` `0000` `0000` `0000` `0000` `0000` `0000`	`200551` `8846B1` `200AA1` `8846B1` `A8F1A1` `000000` `000000` `000000` `000000` `000000`	`MOV #0x55, W1` `MOV W1, NVMKEY` `MOV #0xAA, W1` `MOV W1, NVMKEY` `BSET NVMCON, #WR` `NOP` `NOP` `NOP` `NOP` `NOP`
Step 8: Wait for program operation to complete and make sure the WR bit is cleared.
`0000` `0000` `0000` `0000` `0000` `0001` `0000` `0000` `0000` `0000` `0000` `0000` `0000` `—`	`000000` `804680` `000000` `887E60` `000000` `<VISI>` `000000` `000000` `000000` `040200` `000000` `000000` `000000` `—`	`NOP` `MOV NVMCON, W0` `NOP` `MOV W0, VISI` `NOP` Clock out contents of the VISI register. `NOP` `NOP` `NOP` `GOTO 0x200` `NOP` `NOP` `NOP` Repeat until the WR bit is cleared.
Step 9: Repeat Steps 3-8 until all code memory is programmed.