1.6.1 Overview
The Configuration bits are stored in the last row of the last page location of implemented program memory. These bits can be set or cleared to select various device configurations. There are two types of Configuration bits: system operation bits and code-protect bits. The system operation bits determine the power-on settings for system-level components, such as the oscillator and the Watchdog Timer. The code-protect bits prevent program memory from being read and written.
Table 1-4 lists the Configuration register address for each device memory size and partition configuration. Refer to the “Special Features” chapter in the specific device data sheet for the full Configuration Word register descriptions for your device.
Special attention should be given to the reserved Configuration bits. The FSIGN[15],
FDEVOPT[8] and FDEVOPT[9] Configuration bits must always be programmed (‘0’).
The FPOR[5:4], FICD[7], FDEVOPT[7] and FDEVOPT[10] Configuration bits must always remain
unprogrammed (‘1’).
| Register Name | 256k | 128k | 64k | 32k |
|---|---|---|---|---|
|
FSEC |
0x02BF00 |
0x015F00 | 0x00AF00 | 0x005F00 |
|
FBSLIM |
0x02BF10 |
0x015F10 | 0x00AF10 | 0x005F10 |
|
FSIGN |
0x02BF14 |
0x015F14 | 0x00AF14 | 0x005F14 |
|
FOSCSEL |
0x02BF18 |
0x015F18 | 0x00AF18 | 0x005F18 |
|
FOSC |
0x02BF1C |
0x015F1C | 0x00AF1C | 0x005F1C |
|
FWDT |
0x02BF20 |
0x015F20 | 0x00AF20 | 0x005F20 |
|
FPOR |
0x02BF24 |
0x015F24 | 0x00AF24 | 0x005F24 |
|
FICD |
0x02BF28 |
0x015F28 | 0x00AF28 | 0x005F28 |
|
FDMTIVTL |
0x02BF2C |
0x015F2C | 0x00AF2C | 0x005F2C |
|
FDMTIVTH |
0x02BF30 |
0x015F30 | 0x00AF30 | 0x005F30 |
|
FDMTCNTL |
0x02BF34 |
0x015F34 | 0x00AF34 | 0x005F34 |
|
FDMTCNTH |
0x02BF38 |
0x015F38 | 0x00AF38 | 0x005F38 |
|
FDMT |
0x02BF3C |
0x015F3C | 0x00AF3C | 0x005F3C |
|
FDEVOPT |
0x02BF40 |
0x015F40 | 0x00AF40 | 0x005F40 |
|
FALTREG |
0x02BF44 |
0x015F44 | 0x00AF44 | 0x005F44 |
