2.23.3 MCx Interrupt Status Flag is Not Cleared Automatically
In a capture operation, MC0/MC1 interrupt status flags (INTFLAG.MC0/INTFLAG.MC1) are not automatically cleared when CC0/CC1 registers are read.
Work Around
The MC0/MC1 interrupt status flags must be cleared by software
(INTFLAG.MC0=1/INTFLAG.MC1=1).
Affected Silicon Revisions
PIC32CX1012BZ25048/WBZ451/WBZ451H| A0 | A2 | |||||
|---|---|---|---|---|---|---|
| X | X |
| A2 | |||||
|---|---|---|---|---|---|
| X |