4 Document Revision History

The revision history describes the changes that were implemented in the document. The changes are listed by revision, starting with the most current publication.


Revision	Date	Section	Description
D	11/2024	Overview, Silicon Errata Summary, Silicon Errata Issues	Added WBZ451H related errata and information
		I²C	Added new errata
		VDD min for A0 device is 2.1V	Added new errata
		Data Sheet Clarifications	Added new section
C	07/2024	Silicon Errata Issues	Added new errata: POR Rearm Event Wrong VDD33/2 for ADC Internal Input Channel AN11 Output Logic is Stuck when Enabling a LUT with Sequential Logic after the CCL is Enabled PAC Error when Writing CCL.CTRL.SWRST Bit DMA Writeback Descriptor Corruption Issue Asynchronous Edge Detection Spurious Overrun SYS Reset Not Getting Released when Asserted Post-Erase Retry DMA in Sleep Mode QSPI Status Register Bits Not Updated when PB-Bridge-B (PB2_CLK) is Not Equal to System Clock (SYS_CLK) Incorrect Periodic Daily Event at 23:59:58 Timestamp is Updated Even Tamper Flag is Not Cleared Timestamp Register is Cleared After Debug Read Two Stop Bits Mode is Not Supported in SERCOM USART LIN Host Mode SERCOM LIN Adding Additional Delay Between Break and Sync Bits SERCOM-USART: Flow Control in 32-bit Extension Mode SERCOM-USART: SERCOM USART in TX Mode Only ALOCK Feature MCx Interrupt Status Flag is Not Cleared Automatically Re-trigger MCx Interrupt Status Flag is Not Cleared Automatically
C	07/2024	Silicon Errata Issues	Updated the work around for the following errata: SERCOM-USART: Error Interrupts SERCOM-I²C: Automatic Acknowledge Feature Not Usable SERCOM-I²C: 10-Bit Addressing Mode SERCOM-I²C: Repeated Start Hi-resolution in 2RAMP Mode LUPD in Descendent Mode TCC in Dithering Mode TCC in SYNC or RESYNC Mode
B	01/2024	Overview	Added PIC32CX1012BZ24032/WBZ450-related information
		Silicon Errata Summary	Added PIC32CX1012BZ24032/WBZ450-related information Added new errata
		Silicon Errata Issues	Added PIC32CX1012BZ24032/WBZ450-related information Incorrect VDD Scaler Reference for AC_CMP0 Updated description and workaround Added note Wrong VDD Scaler Reference with CMP0 and CMP1 Enabled Concurrently Updated workaround Added note VIL Input Low Voltage Added note Programming or Debugging Updated workaround CPU Hang Configuration Switch Updated description and workaround Added note Bus Error Address Checks Added note CFGCON0 Registers Added note TCC Outputs Added note TC Outputs Updated description Added note
B	01/2024	Silicon Errata Issues	Added new errata: Occurrence of Fetch Error Measurement Clock Stalls False Tamper Detection Reset of General Purpose Registers on Tamper Detection Reset of INTFLAG.TAMPER Bit Fails RTC SYNCBUSY Register Bits Not Cleared Unwanted Event and Interrupt Generation SERCOM-USART: INTFLAG.TXC being Set Incorrectly SERCOM-USART: Overconsumption in Standby Mode SERCOM-USART: Error Interrupts SERCOM-I²C: Automatic Acknowledge Feature Not Usable SERCOM-I²C: Error Interrupt after Unexpected STOP SERCOM-I²C: Repeated Start Not Issued Correctly SERCOM-I²C: 10-Bit Addressing Mode Counting-down Mode Not Supported in RAMP2 Hi-resolution in 2RAMP Mode LUPD in Descendent Mode TCC in Dithering Mode TCC in SYNC or RESYNC Mode Issues After Clearing STATUS.PERBUFV/STATUS.CCBUFx flag TC.PER not updated properly
A	10/2022	Document	Initial revision