Clock Stretching in Read Mode
The clock is tied low if the internal shifter is empty and if a STOP or REPEATED START condition was not detected. It is tied low until the internal shifter is loaded.
The figure below describes the clock stretching in Read mode.
Note:
- TXRDY is reset when data has been written in TWIHS_THR to the internal shifter and set when this data has been acknowledged or non acknowledged.
- At the end of the read sequence, TXCOMP is set after a STOP or after a REPEATED_START + an address different from SADR.
- SCLWS is automatically set when the clock stretching mechanism is started.