52.6.15 DMA Interface
The descriptor-based DMA interface supports multiple buffers. A DMA stride value shows the offset between two consecutive lines (in bytes). If the stride is set to zero, the frame buffer is contiguous.
When ISC_DCTRL.WB is set (Write Back), the DMA interface performs a single write operation to the ISC_DCTRL register, and sets ISC_DCTRL.DONE to one and ISC_DCTRL.FIELD to the value of the frame field when interlaced content is being used. That means that interlaced fields are tagged with their relevant field values. The Write Back operation is always performed when the whole frame has been transferred to memory.
| ISC_DCFG.IMODE | DMA Engine Input Data |
|---|---|
| PACKED8 | rlp_data[7:0] |
| PACKED16 | rlp_data[15:0] |
| PACKED32 | rlp_data[31:0] |
| YC422SP | rlp_data[31:0] |
| YC422P | rlp_data[31:0] |
| YC420SP | rlp_data[31:0] |
| YC420P | rlp_data[31:0] |
When a bus error is detected, an interrupt flag is set. If the error occurs on a write operation, ISC_INTSR.WERR is asserted. If the error occurs on a read operation, ISC_INTSR.RERR is asserted. ISC_INTSR.WERRID gives details on the first error channel identifier.