34.5.6 Open-Drain Mode

Each I/O can be independently programmed in Open-Drain mode. This feature permits several drivers to be connected on the I/O line which is driven low only by each device. An external pull-up resistor (or enabling of the internal one) is generally required to ensure a high level on the line.

The Open-Drain mode is controlled by the OPD bit in the I/O line configuration (PIO_CFGRx or S_PIO_CFGRx). An I/O line is switched in Open-Drain mode by setting the PIO_CFGRx/S_PIO_CFGRx.OPD bit. The Open-Drain mode can be selected if the I/O line is not controlled by a peripheral (the FUNC field must be cleared in PIO_CFGRx/S_PIO_CFGRx).

For more details concerning the Open-Drain mode, see PIO_CFGRx or S_PIO_CFGRx for secure I/O line configuration.

After reset, the OPD bit of each I/O line is defined at the product level and depends on the multiplexing of the device.

Note: Open-drain capability is not possible when the I/O line is driven by a peripheral. Only software control (GPIO mode) is able to manage the open-drain for an I/O line. TWI is able to manage open-drain because this peripheral does not require the PIO to be configured in Open-drain mode.